Research
Overview
My current research draws from two main areas:
Neuromorphic Computing
Taking inspiration from the brain to build accurate, efficient computing systems.
Floating Gate Analog Circuits
A non-volatile computing device that can interface directly with CMOS circuits to create programmable analog systems.
I work in the Integrated Computational Electronics (ICE) lab at Georgia Tech under Dr. Jennifer Hasler, combining these two areas to build and design programmable analog neuromorphic systems in CMOS technologies that can potentially perform complex tasks more efficiently and accurately than our current computers. Previously I was in the NeuroSpinCompute (NSC) lab under Dr. Joseph Friedman at UT Dallas working on building neuromorphic systems with Spintronic devices.
Projects and Publications
Energy Surface Minimization with Hopfield/Ising Networks
Energy minimization is a computing technique that can efficiently solve difficult problems. Hopfield and Ising networks are two structures that minimize energy, but are expensive to run digitally. Custom analog hardware implementations allow for efficient networks that can also scale to solve large complex tasks such as the NP-hard and associative memory problems.
P. O. Mathews*, C. B. Duffee*, A. Thayil*, T. E. Stovall, C. H. Bennett, F. Garcia-Sanchez, M. J. Marinella, J. A. C. Incorvia, N. Hassan, X. Hu, J. S. Friedman, High-Speed CMOS-Free Purely Spintronic Asynchronous Recurrent Neural Network, APL Machine Learning 1, 016107 (2023).
P. O. Mathews and J. O. Hasler, “Physical Computing for Hopfield Networks on a Reconfigurable Analog IC,” in 2023 IEEE International Symposium on Circuits and Systems (ISCAS), May 2023
(presentation and related poster at CRNCH summit)P. O. Mathews, "Exploring Reconfigurable Hopfield and Ising Networks on the SoC FPAA," M.S Thesis, Dept. of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, Georgia, 2023
P. O. Mathews and J. O. Hasler, "Comparing Analog CMOS Hopfield and Ising Networks on NP-hard Problems," in Government Microcircuit Applications And Critical Technology Conference (GOMAC), March 2024 (poster)
P. O. Mathews and J. O. Hasler, "Hopfield vs Ising: A Comparison on the SoC FPAA," in Transactions on Circuits and Systems I: Regular Papers, 2024
P. O. Mathews and J. O. Hasler, "A Programmable and Reconfigurable CMOS Analog Hopfield Network for NP-hard Problems" in Transactions on Very Large Scale Integration (VLSI) Systems, 2024
P. O. Mathews and J. O. Hasler, "Architectural Considerations for Scalable Ising Machines" in International Conference on Rebooting Computing (ICRC), 2024 (presentation)
Neuromorphic Computing with Biorealistic Silicon Neurons
Our brains perform complex tasks with excellent efficiency everyday. By taking inspiration from this biological machine neuromorphic computing aims to increase our electronic computational capabilities. Hardware, silicon, biorealistic neurons closely emulate the brains main computational device, potentially leading to full networks that can solve difficult problems.
S. Bhattacharyya, P. O. Mathews, P. R. Ayyappan and J. O. Hasler, "Toward Biorealistic Silicon Neural Circuits on Reconfigurable Platforms," 2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS), August 2023
Programmable Analog Computing Systems
Analog computing can efficiently solve complex mathematical equations that digital computer struggle with, and excel at processing real-world continuous time signals for tasks such as classification. Floating-gate technology enables programability in analog circuits and allows for flexible analog standard cells that can be combined to form larger systems.
J. O. Hasler, P. R. Ayyappan, A. Ige, and P. O. Mathews, "A 130nm CMOS Programmable Analog Standard Cell Library," in Transactions on Circuits and Systems I: Regular Papers, 2024
P. O. Mathews, P. R. Ayyappan, A. Ige, S. Bhattacharyya, L. Yang, and J. O. Hasler, "A 65nm and 130nm CMOS programmable analog standard cell library for scalable system synthesis," in Custom Integrated Circuits Conference (CICC), April 2024 (presentation)
L. Hanks, C. Lonergan, K. Richardson, J. Hasler, P. Mathews, and A. Ige, "Analog High-Level Synthesis for Field Programmable Analog Arrays," 2024 IEEE International Opportunity Research Scholars Symposium (ORSS), Atlanta, GA
L. Liu, J. Hasler, and P. Mathews," An Analog MP3 Compression Psychoacoustic Model Implemented on a Field-Programmable Analog Array," in Electronics, 2024
P. O. Mathews, P. R. Ayyappan, A. Ige, S. Bhattacharyya, L. Yang, and J. O. Hasler, "A 65nm CMOS Analog Programmable Standard Cell Library for Mixed-Signal Computing," in Transactions on Very Large Scale Integration (VLSI) Systems, 2024